Error correcting code encoder supporting multiple code rates and throughput speeds for data storage systems
US9122625B1 · kind B1 · utility
8Cited by
108References
27Claims
0Family size
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Key dates
| Filing date | Dec 18, 2012 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Mar 21, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of ECC encoders supporting multiple code rates and throughput speeds for data storage systems are disclosed. In one embodiment, an encoder can provide for flexible and scalable encoding, particularly when quasi-cyclic low-density parity-check code (QC-LDPC) encoding is used. The encoder can be scaled in size based on, for example, the desired encoding throughput and/or computational cycle duration. The encoder can thus be used to support multiple code rates and throughput speeds. Accordingly, encoding speed and efficiency and system performance is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.