Display
US9123282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2011 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Nov 14, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0219
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display is disclosed. The display comprises a panel, a data driver and a scan driver. The panel comprises pixels, data lines and scan lines. The data lines transmit data signals to the pixels, and the scan lines transmit scan signals to the pixels. The data driver provides the data signals, and the scan driver provides the scan signals. The scan driver comprises a shift register circuit. The shift register circuit comprises an i+1th stage carry shift register, an ith stage carry shift register and a jth stage buffer shift register. The ith stage carry shift register generates an i+1th start signal to start the i+1th stage carry shift register, so that the i+1th stage carry shift register generates an i+2th start signal. The i+1th start signal starts the jth stage buffer shift register to generate a jth output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.