Pixel circuit, driving method thereof and pixel array structure
US9123291B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2013 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Dec 16, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a pixel circuit, a driving method thereof and a pixel array structure. The pixel circuit comprises a load controlling module(101), a load module(102), a gray scale selection module(103), a driving module(104) and a light-emitting device(105). The load controlling module(101) outputs an analog data signal through a first node and a second node under the control of a first scan signal (scan1). The load module(102) is connected with a first power supply terminal(VSS), the driving module(104), the first node(A1) and the second node(A2), respectively, and stores the analog data signal in the load module(102) and provides the driving module(104) with the analog data signal under the control of signals from the first node and the second node. The gray scale selection module(103) transmits a digital data signal to a third node(A3) located in the gray scale selection module(103) under the control of a second scan signal (scan2). The driving module(104) drives the light-emitting device(105) under the control of the signals from the second node and the third node. A first terminal of the light-emitting device(105) is connected with a second power supply terminal(VDD), a second t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.