Semiconductor device
US9123536B2 · kind B2 · utility
4Cited by
1References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2014 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Feb 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/82
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor device of an embodiment is provided with a normally-off transistor having a first source connected to a source terminal, a first drain, and a first gate connected to a gate terminal and a normally-on transistor having a second source connected to the first drain, a second drain connected to a drain terminal, and a second gate connected to the source terminal. A withstand voltage between the first source and the first drain when the normally-off transistor is turned off is lower than a withstand voltage between the second source and the second gate of the normally-on transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.