Method of fabricating semiconductor devices
US9123657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2014 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Jul 9, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device is provided. The method may include forming an interlayer insulating layer on a structure with a cell region and a peripheral circuit region, forming a first mask layer on the interlayer insulating layer, forming trenches in the first mask layer exposing the interlayer insulating layer by patterning the first mask layer on the peripheral circuit region, and forming key mask patterns in the trenches. An etch selectivity of the first mask patterns with respect to the interlayer insulating layer may be greater than that of the key mask patterns with respect to the interlayer insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.