Dual loop digital predistortion for power amplifiers
US9124324B2 · kind B2 · utility
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10Claims
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Key dates
| Filing date | Apr 6, 2015 |
| Grant date | Sep 1, 2015 |
| Priority date | — |
| Expiry date | Apr 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/045
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of predistorting an input signal (902) for an amplifier is disclosed (FIG. 9). The method includes predistorting the input signal with a first set of parameters (FDPD) and a second set of parameters (CDPD) at a first time (904). The first set of parameters is updated at a second time (914). The second set of parameters is updated separately from the first set of parameters at a third time (920).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.