System and method for controlling central processing unit power with reduced frequency oscillations
US9128705B2 · kind B2 · utility
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32References
28Claims
0Family size
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Key dates
| Filing date | Nov 11, 2010 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Apr 6, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of dynamically controlling power within a central processing unit is disclosed and may include entering an idle state, reviewing a previous busy cycle immediately prior to the idle state, and based on the previous busy cycle determining a CPU frequency for a next busy cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.