Patent · US Active

Cache-efficient processor and method of rendering indirect illumination using interleaving and sub-image blur

US9129443B2 · kind B2 · utility

130Cited by

0References

19Claims

0Family size

Assignee

NVIDIA Corporation · US

Inventors

Holger Heinrich Gruen · Peising, DE
Louis Bavoil · Courbevoie, FR

Key dates

Filing date	May 21, 2013
Grant date	Sep 8, 2015
Priority date	—
Expiry date	Dec 25, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06T15/60
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A cache-efficient processor and method for rendering indirect illumination using interleaving and sub-image blur. One embodiment of the processor is configured to render an indirect illumination image and includes: (1) a buffer restructurer configured to organize a reflective shadow map (RSM), rendered with respect to a reference point, into a plurality of unique sub-RSMs, each having sub-RSM pixels, (2) an indirect illumination computer configured to employ interleaved sampling on the plurality of unique sub-RSMs to generate a plurality of indirect illumination sub-images, and (3) a filter operable to smooth accumulated light values of the indirect illumination sub-images for subsequent interleaving into the indirect illumination image.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.