Patent · US Active

Semiconductor storage apparatus and method including executing refresh in a flash memory based on a reliability period using degree of deterioration and read frequency

US9129699B2 · kind B2 · utility

15Cited by
1References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 28, 2011
Grant dateSep 8, 2015
Priority date
Expiry dateNov 23, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/72
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor storage apparatus comprises a memory controller and flash memories which include a plurality of blocks as storage areas. The memory controller is configured to manage a degree of deterioration and read frequency for each of the plurality of blocks. A reliability maintained period is calculated for each storage area based on the degree of deterioration and read frequency for each storage area of a flash memory, and refresh is executed on each storage area in a planned manner based on the calculated reliability maintained period by newly storing the data stored in a block in another block based on an obtained reliability maintained period. The memory controller may also be configured to execute verification on each block and, if the number of failure bits is larger than a predetermined threshold, execute refresh to store data which is stored in a verification target block in another block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.