Method for manufacturing transistor
US9129992B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2011 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Jun 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
Abstract
Designs and fabrication of dual-gate thin film transistors are provided. An active region and a top gate electrode of the transistor can be made of a transparent thin film material. A photoresist can be coated onto a surface of the transparent conductive thin film for forming the top gate electrode. Light is from the bottom of the substrate during exposure. After the development, a photoresist pattern aligned with the bottom gate electrode is formed on the surface of the conductive thin film. The top gate electrode aligned with the bottom gate electrode is formed by etching the conductive thin film. The bottom gate electrode can be used as a mask, which may save the cost for manufacturing the transistor and improve the accuracy of alignment between the top gate electrode and the bottom gate electrode and the performance of the dual-gate thin film transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.