Field effect power transistors
US9130028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2012 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Aug 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
Abstract
A normally OFF field effect transistor (FET) comprising: a plurality of contiguous nitride semiconductor layers having different composition and heterojunction interfaces between contiguous layers, a Fermi level, and conduction and valence energy bands; a source and a drain overlying a top nitride layer of the plurality of nitride layers and having source and drain access regions respectively comprising regions of at least two of the heterojunctions near the source and drain; a first gate between the source and drain; wherein when there is no potential difference between the gates and a common ground voltage, a two dimensional electron gas (2DEG) is present in the access region at a plurality of heterojunctions in each of the source and drain access regions, and substantially no 2DEG is present adjacent any regions of the heterojunctions under the first gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.