Gain synchronization circuitry for synchronizing a gain response between output stages in a multi-stage RF power amplifier
US9130530B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Oct 1, 2013 |
| Grant date | Sep 8, 2015 |
| Priority date | — |
| Expiry date | Feb 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/0458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multi-stage radio frequency (RF) power amplifier includes a high-power amplifier path and a low-power amplifier path. The low-power amplifier path includes gain synchronization circuitry in order to synchronize the gain response of the high-power amplifier path and the low-power amplifier path. By synchronizing the gain response of the high-power amplifier path and the low-power amplifier path, the gain linearity of the multi-stage RF amplifier is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.