GPU memory buffer pre-fetch and pre-back signaling to avoid page-fault
US9134954B2 · kind B2 · utility
1Cited by
20References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2012 |
| Grant date | Sep 15, 2015 |
| Priority date | — |
| Expiry date | Sep 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure proposes techniques for demand paging for an IO device (e.g., a GPU) that utilize pre-fetch and pre-back notification event signaling to reduce latency associated with demand paging. Page faults are limited by performing the demand paging operations prior to the IO device actually requesting unbacked memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.