Multi-core re-initialization failure control system
US9135126B2 · kind B2 · utility
1Cited by
20References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 7, 2013 |
| Grant date | Sep 15, 2015 |
| Priority date | — |
| Expiry date | Oct 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of a computer system recovering from a core re-initialization failure is described. The method may include automatically detect a core re-initialization failure during a core re-initialization process by a hypervisor. The hypervisor automatically determines whether the core re-initialization failure is a permanent failure. If the core re-initialization failure is a permanent failure, then automatically determine, by the hypervisor, which cores are re-initialized and which cores are indeterminate. Automatically allocate the re-initialized cores between one or more virtual machines by the hypervisor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.