Patent · US Active

Techniques for accessing a dynamic random access memory array

US9135982B2 · kind B2 · utility

9Cited by

7References

25Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Andre Schaefer · Hersbruck, DE
Jen-Chieh Yeh · Kaohsiung, TW
Pei-Wen Luo

Key dates

Filing date	Dec 18, 2013
Grant date	Sep 15, 2015
Priority date	—
Expiry date	Dec 18, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/2281
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Examples are disclosed for accessing a dynamic random access memory (DRAM) array. In some examples, sub-arrays of a DRAM bank may be capable of opening multiple pages responsive to a same column address strobe. In other examples, sub-arrays of a DRAM bank may be arranged such that input/output (IO) bits may be routed in a serialized manner over an IO wire. For these other examples, the IO wire may pass through a DRAM die including the DRAM bank and/or may couple to a memory channel or bus outside of the DRAM die. Other examples are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.