Patent · US Active

Temperature based logic profile for variable resistance memory cells

US9135993B2 · kind B2 · utility

2Cited by
5References
20Claims
0Family size

Inventors

Key dates

Filing dateFeb 7, 2013
Grant dateSep 15, 2015
Priority date
Expiry dateJun 20, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/5641
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A data storage device may generally be constructed and operated with at least one variable resistance memory cell having a first logic state threshold that is replaced with a second logic state threshold by a controller. The first and second logic states respectively corresponding to a predicted resistance shift that is based upon an operating temperature profile.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.