Method of adjusting a threshold voltage of a transistor in the forming of a semiconductor device including the transistor
US9136187B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2013 |
| Grant date | Sep 15, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes forming a first transistor and a second transistor on a substrate, monitoring processes of forming the first and second transistors to find an error and performing an additional ion implantation process to form a low-concentration dopant region or a halo region on the first transistor or the second transistor corresponding to a found error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.