Compound tunneling field effect transistor integrated on silicon substrate and method for fabricating the same
US9136363B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Sep 15, 2015 |
| Priority date | — |
| Expiry date | Dec 30, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/311
Abstract
Compound tunneling field effect transistors integrated on a silicon substrate are provided with increased tunneling efficiency and an abrupt band slope by forming a source region with a material having a bandgap at least 0.4 electron volts (eV) narrower than that of silicon to increase a driving current (ON current) by forming a channel region with a material having almost no difference in lattice constant from a source region and having a high electron mobility at least 5 times higher than silicon. ON/OFF current ratio simultaneously is increased by forming a drain region with a material having a bandgap at least as wide as a channel region material to restrain OFF current. Tunneling field effect transistors having various threshold voltages according to circuit designs are formed easily by adding a specific material with an electron affinity less than a source region material when forming a channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.