Thread consolidation in processor cores
US9141173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2013 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Aug 15, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method for thread consolidation is provided for a system that includes an operating system and a multi-core processing chip in communication with an accelerator chip. The method includes running an application having software threads on the operating system, mapping the software threads to physical cores in the multi-core processing chip, identifying one or more idle hardware threads in the multi-core processing chip and identifying one or more idle accelerator units in the accelerator chip. The method also includes executing the software threads on the physical cores and the accelerator unit. The method also includes the controller module consolidating the software threads executing on the physical cores, resulting in one or more idle physical cores and a consolidated physical core. The method also includes the controller module activating a power savings mode for the one or more idle physical cores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.