Patent · US Active

Method for securing a microprocessor, corresponding computer program and device

US9141793B2 · kind B2 · utility

1Cited by
12References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 26, 2008
Grant dateSep 22, 2015
Priority date
Expiry dateJul 23, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/755
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method is provided for securing a microprocessor containing at least one main program, which operates with at least one memory. The method includes implementing counter-measures, during which additional operations, that are not required for the main program, are implemented so as to modify the consumption of current and/or the processing time of the microprocessor. The method also includes: identification of at least one address or one memory zone of the memory(ies), called critical addresses, and which contain, or which may contain, critical data for said main program; monitoring the addressing ports of the memory(ies), so as to detect the access to the critical address(es); and activation of the step of implementing counter-measures, when an access to the critical address(es) is detected.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.