Embedded memory device and memory controller including the same
US9142317B2 · kind B2 · utility
1Cited by
10References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2014 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Apr 1, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embedded memory device includes a mask ROM including a plurality of mask ROM cells and an address decoder configured to decode an address of the plurality of mask ROM cells; and an e-fuse memory configured to replace a part of data stored in the mask ROM with replacement data, the e-fuse memory including, a plurality of e-fuse memory cells configured to store the replacement data, and an e-fuse address selector configured to decode an address of the plurality of e-fuse memory cells and to selectively cause data of one or more of the plurality of e-fuse memory cells to be output based on the decoding result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.