Patent · US Active

Memory manager

US9142322B2 · kind B2 · utility

5Cited by
1References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 12, 2013
Grant dateSep 22, 2015
Priority date
Expiry dateNov 12, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0409
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An embodiment of a manager includes at least one input node configured to receive information regarding a region of an integrated circuit, and a determiner configured to determine, in response to the information, a likelihood that the region will cause an error. For example, the region may include a memory, and contents of the memory may be transferred to another, more reliable memory, if the likelihood that the memory will cause an error in the data that it stores equals or exceeds a likelihood threshold.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.