Hardware acceleration of DSP error recovery for flash memory
US9142323B1 · kind B1 · utility
10Cited by
1References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 29, 2012 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Jul 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for correcting a cell voltage driftage in a NAND flash device is disclosed. An indicator indicating a cell voltage driftage in a memory unit of a NAND flash device is monitored by a processor. A cell voltage driftage in the NAND flash device is detected based at least in part on the indicator. One or more NAND commands correcting the cell voltage driftage are generated. The one or more NAND commands include a NAND command associated with changing a configuration setting of the NAND flash device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.