Semiconductor package stack having a heat slug
US9142478B2 · kind B2 · utility
5Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2013 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Dec 10, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package stack may include a lower semiconductor package and an upper semiconductor package stacked on a lower package board. The upper semiconductor package may include an upper semiconductor chip mounted on an upper package board with an opening configured to expose a lower surface of the upper semiconductor chip and a first heat slug disposed within the opening, contacting the lower surface of the upper semiconductor chip, and contacting an upper surface of a lower semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.