Semiconductor array having temperature-compensated breakdown voltage
US9142552B2 · kind B2 · utility
1Cited by
3References
5Claims
0Family size
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Key dates
| Filing date | Oct 2, 2014 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Oct 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/121
Abstract
A semiconductor array is described whose breakdown voltage has only a very low temperature coefficient or none at all and therefore there is little or no temperature-dependent voltage rise. The voltage limitation is achieved by a punch-through effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.