Semiconductor wafer comprising gallium nitride layer having one or more silicon nitride interlayer therein
US9142723B2 · kind B2 · utility
6Cited by
3References
18Claims
0Family size
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Inventors
Key dates
| Filing date | Oct 12, 2011 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Mar 3, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/548
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer comprising a substrate layer and a first GaN layer having one or more SiNx interlayers therein, wherein in the first GaN layer at least one SiNx interlayer has GaN penetrated through one or more portions of said SiNx interlayer and preferably has a thickness of from 0.5 to 10 nm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.