Detection and mitigation of interference in a receiver
US9143246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2014 |
| Grant date | Sep 22, 2015 |
| Priority date | — |
| Expiry date | Jul 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/16
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver architecture optimizes receiver performance in the presence of interference. In various embodiments, power estimation circuits are used with variable selectivity to determine the exact nature of the interference and to optimize the performance correspondingly. The variable selectivity is achieved using stages of filtering with progressively narrower bandwidths. Also, the actual method of optimizing the receiver performance is an improvement compared to the traditional techniques in that the gain settings and the baseband filter order (stages to be used) will be optimized based on the nature of the interference as determined by the power detector measurements. For a device such as a cellular phone that operates in a dynamic and changing environment where interference is variable, embodiments advantageously provide the capability to modify the receiver's operational state depending on the interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.