Patent · US Active

Systems and methods for eliminating inconsistencies between backing stores and caches

US9146868B1 · kind B1 · utility

0Cited by
5References
20Claims
0Family size

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Key dates

Filing dateJan 17, 2013
Grant dateSep 29, 2015
Priority date
Expiry dateDec 7, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/314
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer-implemented method for eliminating inconsistencies between backing stores and caches may include (1) detecting at least one inconsistency between a backing store and a cache, (2) identifying a synchronization marker that bifurcates write operations queued in the cache into (i) a subset of one or more write operations known to have been successfully performed on the backing store and (ii) an additional subset of one or more additional write operations not yet known to have been successfully performed on the backing store, (3) identifying the additional subset of additional write operations based at least in part on the synchronization marker, (4) performing the additional subset of additional write operations on the backing store, and then (5) updating the synchronization marker based at least in part on performing the additional subset of additional write operations on the backing store. Various other methods, systems, and computer-readable media are also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.