Transparent efficiency for in-memory execution of map reduce job sequences
US9147373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2012 |
| Grant date | Sep 29, 2015 |
| Priority date | — |
| Expiry date | Sep 14, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/2471
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Executing a map reduce sequence may comprise executing all jobs in the sequence by a collection of a plurality of processes with each process running one or more mappers, combiners, partitioners and reducers for each job, and transparently sharing heap state between the jobs to improve metrics associated with the job. Processes may communicate among themselves to coordinate completion of map, shuffle and reduce phases, and completion of said all jobs in the sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.