Patent · US Active

Digital down converter with equalization

US9148162B2 · kind B2 · utility

2Cited by
7References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 13, 2015
Grant dateSep 29, 2015
Priority date
Expiry dateJan 13, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03D2200/0056
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A digital down converter with equalization includes an analog to digital converter (ADC), a frequency divider, an FIR-decimator-I, an FIR-decimator-Q and a frequency corrector. In operation, after some preprocessing, the FIR-decimator-I performs signal transformation equivalent to a sequence of equalization, multiplication of the processed signal by a sine wave of a conversion frequency and low pass filtering, and the FIR-decimator-Q performs signal transformation equivalent to a sequence of equalization, multiplication of the processed signal by a sine wave of conversion frequency with a phase shift of 90° and low pas filtering. The transformed signals are applied to the frequency corrector, which provides a frequency shift of predetermined value with respect to a nominal carrier frequency of the applied analog input signal and generates an In-Phase output and a Quadrature output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.