Patent · US Active

System and method of improving stability of continuous-time delta-sigma modulators

US9148168B2 · kind B2 · utility

2Cited by

6References

17Claims

0Family size

Assignee

Analog Devices Global Unlimited Company · BM

Inventors

Zhao Li · Austin, US
David Alldred · Toronto, CA

Key dates

Filing date	Oct 29, 2013
Grant date	Sep 29, 2015
Priority date	—
Expiry date	Dec 17, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03M3/454
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An analog-to-digital converter (ADC) can include a continuous-time delta sigma modulator and calibration logic. The calibration logic can calibrate direct feedback and flash clock delay coefficients of the continuous-time delta-sigma modulator without interrupting the normal operations of the ADC (e.g., in situ). Thus, the calibration logic can rectify performance and stability degradation by calibrating suboptimal coefficients.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.