Digital frequency synthesis
US9148278B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2014 |
| Grant date | Sep 29, 2015 |
| Priority date | — |
| Expiry date | Jul 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/099
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and techniques for oscillator control are described. A fixed or controlled oscillator feeds a plurality of evenly spaced tap points multiplexed to an output by a multiplexer. A phase change control circuit changes the multiplexer to a new tap point one phase tap at a time, with the change being made when an oscillator clock edge will not be repeated to an output. The phase change control circuit determines when to change the multiplexer setting based on the overflow of an accumulator, which is continuously summing an increment value. The sign of the accumulator increment value determines the direction of the multiplexor updates. The resulting output signal from the multiplexor is a new output frequency related to the oscillator frequency and the accumulator increment value. With a plurality of multiplexer controlled outputs and corresponding phase change control circuits, a plurality of output frequencies can be created from one oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.