Data storage device, controller, and operating method of data storage device
US9153332B2 · kind B2 · utility
5Cited by
10References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2013 |
| Grant date | Oct 6, 2015 |
| Priority date | — |
| Expiry date | Oct 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory is provided which includes a memory cell array including a plurality of nonvolatile memory cells; a decoder connected with the memory cell array through a plurality of word lines; a data input/output circuit connected with the memory cell array through a plurality of bit lines; a voltage detector configured to detect a variation in a power supply voltage to output a voltage variation signal; and control logic configured to control the decoder and the data input/output circuit such that data stored at the memory cell array is invalidated in response to the voltage variation signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.