Offset compensation in driving circuits
US9154153B2 · kind B2 · utility
2Cited by
3References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2012 |
| Grant date | Oct 6, 2015 |
| Priority date | — |
| Expiry date | May 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/70
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Apparatus and methods are presented for compensating for offsets in digital-to-analog converters (DACs). An apparatus may comprise a gain block. The non-inverting input of the gain block may be provided with a bias voltage selected to exceed the worst-case expected positive offset of a DAC. Feedback from the output of the gain block may be provided to a processor. The processor may be connected to drive the DAC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.