Patent · US Active

Method and circuit arrangement for operating light-emitting means, with beat avoidance

US9155144B2 · kind B2 · utility

11Cited by
1References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 20, 2012
Grant dateOct 6, 2015
Priority date
Expiry dateDec 20, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05B45/385
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

The invention relates to an operating circuit for illuminants, in particular one or more LED sections (17), comprising an actively clocked PFC circuit (11), which can be supplied by an AC voltage (UAC) and optionally also a DC voltage (UDC) and the output voltage of which is directly or indirectly supplied through the illuminant (17) to a unit (19) for generating a PWM-modulated current. The operating circuit also has a control unit (16) that detects a residual ripple in the voltage (UPFC) in the supply chain before (18a), in (18b) or after (18c) the PFC circuit (11) and causes the frequency of the PWM modulation of the current through the illuminant (17) to be selected as a function of the frequency of the residual ripple.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.