Patent · US Active

Array substrate structure and display panel and manufacturing method thereof

US9158162B2 · kind B2 · utility

5Cited by
3References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 18, 2013
Grant dateOct 13, 2015
Priority date—
Expiry dateOct 17, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldOptics
  • WIPO sectorInstruments

Abstract

An array substrate structure including a first substrate, a plurality of thin film transistors, a first dielectric layer, a second dielectric layer, and a second electrode layer is provided. Each of the thin film transistors has a patterned first electrode layer which is disposed on the first electrode layer and has a first through hole. The second dielectric layer is disposed on the first dielectric layer and has a second through hole. The second through hole is connected to the first through hole, such that the second electrode layer is electrically connected to the first electrode layer via the first through hole and the second through hole.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.