Bios failover update with service processor having direct serial peripheral interface (SPI) access
US9158628B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Apr 22, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Certain aspects direct to systems and methods of BIOS failover update with a service processor (SP) having direct serial peripheral interface (SPI) access to a basic input/output system (BIOS) chip of a host computer. In certain embodiments, the SP receives a failover backup image from a BIOS being executed at a CPU of the host computer through a system interface, and stores the failover backup image in the volatile memory. Then the SP monitors operation of the BIOS by receiving, from the BIOS, a notification signal. When the SP detects an error in the operation of the BIOS based on the notification signal, the SP sends a copy of the failover backup image to the BIOS chip of the host computer through the SPI to replace a current BIOS image stored in the BIOS chip of the host computer with the copy of the failover backup image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.