Patent · US Active

Memory controller supporting concurrent volatile and nonvolatile memory modules in a memory bus architecture

US9158716B2 · kind B2 · utility

4Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 7, 2011
Grant dateOct 13, 2015
Priority date
Expiry dateApr 7, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/205
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.