Patent · US Active

Addressable integrated circuit and method thereof

US9158727B2 · kind B2 · utility

2Cited by
21References
30Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 30, 2010
Grant dateOct 13, 2015
Priority date
Expiry dateDec 9, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/396
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An exemplary method and system of addressing an integrated circuit within a daisy chain network. In the exemplary method, the address of the integrated circuit may be initialized to a predetermined initial address. The integrated circuit may receive a command that includes a type identifier and an address field. Based on the type identifier, the type of command may be determined. As a result of the determination, reading the address from the address field. The read address may be stored in a register. The address may be modified, and may be output. Upon receipt of the data or a command, the integrity of the data including data within the received command, may be confirmed by an error checking algorithm.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.