Unauthorized access and/or instruction prevention, detection, and/or remediation, at least in part, by storage processor
US9158916B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2012 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Jan 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/78
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment may include a storage processor that may be comprised, at least in part, in a host. The host may include at least one host central processing unit (CPU) to execute at least one host operating system (OS). The storage processor may execute at least one operation in isolation from interference from and control by the at least one host CPU and the at least one host OS. The at least one operation may facilitate, at least in part: (1) prevention, at least in part, of unauthorized access to storage, (2) prevention, at least in part, of execution by the at least one host CPU of at least one unauthorized instruction, (3) detection, at least in part, of the at least one unauthorized instruction, and/or (4) remediation, at least in part, of at least one condition associated, at least in part, with the at least unauthorized instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.