Wafer transport apparatus
US9159600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2013 |
| Grant date | Oct 13, 2015 |
| Priority date | — |
| Expiry date | Sep 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The wafer transport apparatus prevents contaminant deposited on an unprocessed wafer from adhering to a processed wafer. Carrying-in load port 2A is loaded with a FOUP 1 storing an unprocessed wafer W1. Carrying-in chamber 3A has a transport robot 4A which takes out the unprocessed wafer W1 from the FOUP 1. Carrying-in load lock 5A is accessed by the transport robot 4A from the carrying-in chamber 3A side. Carrying-out load port 2B is loaded with the FOUP 1 that can store a processed wafer W2. Carrying-out chamber 3B has a transport robot 4B which passes the processed wafer W2 to the FOUP 1. Carrying-out load lock 5B is accessed by the transport robot 4B from the carrying-out chamber 3B side. The carrying-in chamber 3A and carrying-out chamber 3B are separated from each other. The carrying-in load lock 5A and carrying-out load lock 5B are arranged on different stages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.