Method and system to manage memory accesses from multithread programs on multiprocessor systems
US9164812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2009 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Mar 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, computer program and system for controlling accesses to memory by threads created by a process executing on a multiprocessor computer. A page table structure is allocated for each new thread and copied from the existing threads. The page access is controlled by a present bit and a writable bit. Upon a page fault the access is provided to one thread. The kernel handles the new page entry creation process and set the page present bits to zero which creates page faults. In a second embodiment, two page table structures are created, one for one thread having access to the address space and the other page table structure shared by all the other threads not having access to the address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.