Patent · US Active

High performance low profile QFN/LGA

US9165795B2 · kind B2 · utility

0Cited by
4References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 9, 2010
Grant dateOct 20, 2015
Priority date
Expiry dateDec 4, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/18161
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a semiconductor device is disclosed. In one embodiment a semiconductor die is formed overlying a substrate. The semiconductor die is flip chip mounted to the substrate, wherein the substrate comprises a plurality of conductive traces. The semiconductor die and substrate are encapsulated with an encapsulating material. A top side of the encapsulating material is subjected to one of polishing, etching, and grinding to expose a top side of the semiconductor die. Finally, the bottom side of the substrate is subjected to one of polishing, etching, and grinding to remove the substrate and to reduce a thickness of the plurality of conductive traces.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.