Image sensor with pixel units having mirrored transistor layout
US9165959B2 · kind B2 · utility
17Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2013 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Jan 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/8027
Abstract
An image sensor includes a first pixel unit horizontally adjacent to a second pixel unit. Each pixel unit includes plurality of photodiodes and a shared floating diffusion region. A first pixel transistor region of the first pixel unit has a plurality of pixel transistors. A second pixel transistor region of the second pixel unit is horizontally adjacent to the first pixel transistor region and also has a plurality of pixel transistors. A transistor layout of the second pixel transistor region is a minor image of a transistor layout of the first pixel transistor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.