Multiple gate semiconductor devices and their applications
US9166052B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2014 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Dec 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H7/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiple gate semiconductor structure is disclosed having a thin segment of semiconductor with first and second major surfaces that are opposite one another, a first gate on the first major surface of the segment, a second gate on the second major surface of the segment opposite the first gate, a first differential input coupled to the first gate, and a second differential input coupled to the second gate. Preferably the semiconductor structure is symmetrical about a plane that extends through the thin segment between the first and second major surfaces. When a first voltage of a first polarity is applied to the first input and a second voltage of the same magnitude as that of the first voltage but of opposite polarity is applied to the second input, a virtual ground is established in the structure near its center of the segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.