Stabilization structure including sacrificial release layer and staging cavity
US9166114B2 · kind B2 · utility
141Cited by
54References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2013 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Jan 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H29/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is held within an array of staging cavities on a carrier substrate. Each micro device is laterally surrounded by sidewalls of a corresponding staging cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.