Amplification circuit having optimization of power
US9166527B2 · kind B2 · utility
0Cited by
5References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 26, 2012 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Jun 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/453
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Power amplifier circuit comprising an input, an output comprising: By activating or deactivating one or more of the n cascode circuits, the total size of the amplification components can be adapted to the value of the output power to generate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.