Converter arrangement and method for converting an analogue input signal into a digital output signal
US9166610B2 · kind B2 · utility
Inventor
Key dates
| Filing date | Dec 19, 2014 |
| Grant date | Oct 20, 2015 |
| Priority date | — |
| Expiry date | Dec 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to an arrangement and a method for the identification of parameters in a nonlinear model of an analog-to-digital converter (ADC 17) and the use of this information to reduce the nonlinear distortions of the ADC. A parameter estimator determines an AD parameter vector PAD which describes the nonlinearities of the ADC (17). According to the invention the ADC is excited by a perturbed input signal y′A generated by adder 77 which combines the analog input signal yA with perturbation signal s1 provided by generator. The nonlinear system identification uses intermodulation distortion generated in the digital ADC output signal y′D which are not found in the analog input signal yA. A nonlinear AD compensation element compensates based on parameter vector PAD the nonlinear distortion generated by the ADC and generates the linearized output signal yD. Digital control information PP,1 are used to generate the perturbation signal s1 in generator and to remove the perturbation signal the compensation element. The linearized ADC (is the basis for linearizing digital-analog-converters (DAC), amplifiers and other hardware components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.