Voltage regulator with improved line rejection
US9170593B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 16, 2013 |
| Grant date | Oct 27, 2015 |
| Priority date | — |
| Expiry date | Dec 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Devices and methods are provided for generating a regulated output voltage with improved line rejection based on an input voltage and a reference voltage. The device may include a pass transistor and a replica transistor, wherein source ports of the pass transistor and the replica transistor are coupled to the input voltage, a drain port of the pass transistor is coupled to the output voltage, and a gate port of the pass transistor is coupled to a gate port of the replica transistor. The device may further include a coupling circuit configured to couple current from the drain port of the replica transistor to the gate port of the replica transistor, the coupling circuit further configured to control voltage on the drain port of the replica transistor based on the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.