Patent · US Active

Efficient method for memory accesses in a multi-core processor

US9170753B2 · kind B2 · utility

10Cited by

4References

13Claims

0Family size

Assignee

Peking University · CN

Inventors

Yifeng Chen · Taizhou City, CN
Weilong Cui · Beijing, CN
Xiang CUI · Beijing, CN

Key dates

Filing date	Dec 30, 2013
Grant date	Oct 27, 2015
Priority date	—
Expiry date	Jun 8, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of providing memory accesses for a multi-core processor includes reserving a group of pins of a multi-core processor to transmit either data or address information in communication with one or more memory chips, receiving memory access requests from the plurality of processor cores, determining granularity of the memory access requests by a memory controller, and dynamically adjusting the number of pins in the group of pins to be used to transmit address information based with the granularity of the memory access requests.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.